1. Field of the Invention
This invention relates generally to configurations and fabrication methodologies for light-emitting devices which are comprised of multiple ceramic layers constructed on a supporting substrate and which use electroluminescent phosphors as a light source.
2. Description of Related Art
The fabrication and commercial application of electroluminescent lamps (EL) is a well established art spanning more than five (5) decades. Typically, EL devices use doped zinc sulfide phosphors dispersed in a dielectric material and placed between conductive electrode surfaces. The application of a suitable AC voltage creates an electric field in the dielectric material exciting the phosphors into luminescence. A transparent electrode is used adjacent the phosphor material permitting the generated light to escape, forming a lamp.
The prior art includes multiple examples of both plastic and ceramic configurations. Ceramic devices received intense development attention over approximately a 10 year period from 1960 to 1970. However, due to the complexity of the ceramic EL devices, there was little success in developing a viable configuration and production process that was competitive. Virtually all successful commercial applications over the intervening several decades have been based on plastic materials and associated processing systems.
U.S. Pat. No. 4,482,580 by Emmett et al attempted to develop and commercialize a variant of device concepts first defined by Buck in U.S. Pat. No. 3,073,982 and Westerveld in U.S. Pat. Nos. 3,201,632 and 3,200,279. The manufacturing yields of the Emmett design proved too low, and the power dissipation levels too high, to successfully compete with plastic EL devices. The Emmett design has other significant performance difficulties as will become evident in comparison with this invention.
Most recently, Winsor (U.S. Pat. No. 6,091,192) sought to improve the Emmett design by adding two (2) new layers (an insulation layer plus a base electrode layer) with the expectation of reduced dissipation levels and improved manufacturing control. The Winsor approach is a variant of device concepts first defined by Diemer (U.S. Pat. No. 3,275,870) and Rulon (U.S. Pat. No. 3,103,607). Although some performance improvement relative to Emmett would be expected, the production costs would be significantly increased due to the additional layers. Further, Winsor fails to address other performance difficulties as will become evident in comparison with this invention.
In short, the substantive prior art related to this invention dates largely to the 1960s. This body of work, now in the public domain, is for the most part conceptual, with validation limited to small area devices and a few specific performance requirements. In fact, this prior art (and subsequent noted improvements to the same) have mostly served to confirm that useful devices are possible but have failed to define integrated material systems and processes which could realize this potential in a commercially viable product. There are significant omissions in the set of required device attributes considered, and inadequate attention to the complex interactions between the material compositions in the various device layers. The special challenges of large area devices (e.g. >1 sq-ft) both in terms of production cost and performance were generally not considered in the prior art.
It is the object of this invention to describe and demonstrate an integrated set of materials and processes which achieve a dramatic improvement in both ceramic EL performance and cost relative to the prior art. This new fabrication methodology and associated materials system are applicable to large areas and enable devices which are superior to plastic EL in many important applications, including those with severe environmental exposure requirements.
A conceptual layout for a typical prior-art ceramic EL device is illustrated in FIG. 1. A metal substrate 1 provides structural support while also serving as a base electrode. An insulating layer 3 is constructed on the substrate providing break-down isolation for an overlying ceramic matrix encasing the EL phosphor 5. A transparent top electrode 7 completes the electrical circuit permitting an intense AC field to be established across the ceramic stack. A transparent ceramic cover layer 9 is used to protect the top electrode 7 and the phosphor layer 5 from the ambient environment. Given a nominal 10:1 ratio between the dielectric constant of the insulation layer relative to the phosphor layer, most of the applied voltage will appear across the ceramic matrix containing the phosphor. Yet in the event of short-circuit through the phosphor layer, the insulating layer will limit the current and help minimize degradation in device performance. This model is deceptively simplistic because the ceramic stack is a blended mechanical, chemical, electrical, and optical system formed through a sequence of molten states, each with a unique time-temperature profile providing the opportunity for diffusion of various constituents between layers and contributing complex residual mechanical stresses upon cool-down to ambient temperature.
In terms of design priorities, a fundamental requirement is that the stack must bond together mechanically with minimal distortions and fracturing due to residual stresses arising from mismatched coefficients of thermal expansion which are compounded by temperature gradients during processing. The cool-down time-temperature profile is often as important as the peak temperatures reached. The metal-to-ceramic bond lines at the substrate are particularly troublesome because the coefficients of thermal expansion cannot be exactly matched and the constituents in the ceramic mix which contribute to a strong bond (generally metal oxides) have an adverse effect on the electrical properties of the insulation (dielectric) layer. Further, given device areas of several square feet and the inevitable temperature gradients induced by the high temperature oven system, there will be micro-cracking penetrating multiple levels. In practical terms, the device design must accommodate a significant level of statistically certain imperfection while minimizing the adverse performance effects. Therefore optimum device performance is not a simple summation of optimum components. The complexity of the ceramic EL system, and the difficulty in achieving viable commercialization in prior art devices, arises in no small part from these non-linear interactions, especially including a tolerance for some number of localized faults in large area devices.
An exemplary prior art method, as taught by Buck, et al. (U.S. Pat. Nos. 3,073,982 and 3,275,870) is illustrated in FIG. 2. Buck uses low carbon enameling steel as the substrate 11 providing a reasonable thermal expansion coefficient match with an overlying ceramic layer. The mechanical bond to the substrate is achieved through an overlying semiconductive ceramic layer. The mechanical bond to substrate is achieved through an overlying semiconductive ceramic layer 12 formed by a materials mix containing titanium oxide which becomes semiconductive upon diffusion of iron from the steel substrate. The conductivity of this semiconducting ceramic is sufficiently high as to substantially reduce the power dissipation in this layer. The dielectric layer 13 is formed as a matrix of finely ground barium titanate combined with a glass which also contains titanium oxide. This layer serves to slow the diffusion of iron toward the vulnerable phosphor layer while providing improved break-down protection. The EL phosphor is encased in a glass matrix 14 with an overlying transparent conductive top electrode 15. A protective top cover is provided by bonding an organic adhesive layer 16 and a top electrode 15 wherein the rolled glass provides an improved environmental durability in comparison with enameling processes using glass frits. Buck reports an overall performance level of 7 mw/sq. in of power dissipation at 120 volts, 60 Hz, with an illumination output of 1.2 to 1.5 ft-lamberts. In comparison, the invention disclosed herein achieves this illumination level with a power dissipation of less than 2 mw/sq-in, which is more than a 3:1 improvement.
The materials system taught by Buck does not provide an adequate match in thermal expansion coefficients between the substrate and the semiconducting layer. Hence in large area planar devices (e.g. panels >1 sq-ft), the panels will distort during processing, increasing the magnitude of thermal gradients induced by the oven system and contributing to micro-cracking in the various ceramic layers. Further, the mechanical adhesion between the semiconducting layer and the substrate is significantly weakened by the detailed chemistry of the interaction of the iron oxide interface (which largely provides the bond) with the substantial titanium oxide constituent in the overlying ceramic.
The substrate configuration taught by Emmett suffers from the same limitations. In fact, the residual stresses noted in commercialization attempts based on the Emmett design were such that a post-processing mechanical stress relief step involving bombardment of the substrate rear surface with small metal spheres (in a fashion similar to sandblasting) was required to regain a flat surface.
The rear surface of a low carbon steel substrate is also a major processing contaminate as a result of flaking due to oxidation at the high temperatures required for the ceramic melding. This invention achieves a substantially improved match in thermal expansion coefficients, a substantially improved level of mechanical adhesion, and a total elimination of the flaking debris problem.
The dielectric layer taught by Buck is intended to provide a barrier for further diffusion of iron beyond the semiconducting layer. The barium titanate is relatively immune because the processing temperatures are well below its melting point. However, the glass constituent of the dielectric layer will support iron diffusion introducing possible contamination of the zinc sulfide phosphor layer which is particularly sensitive to iron. The use of titanium oxide in this glass, which potentially increases the dielectric constant, to trap the iron also results in semiconducting behavior and a degraded dissipation factor for the dielectric layer. Iron diffusion effects are the most likely reason for the inferior dissipation levels realized in the Buck design. This invention uses a different doping agent for the semiconducting layer and a different barrier strategy to limit diffusion into and beyond the dielectric layer, leading to superior overall dissipation levels for the device.
The rolled glass protective layer 17 taught by Buck exhibits desirable durability properties. However, the organic bond material 16 is combustible and in direct contact with the top electrode 15. In the event of localized voltage break-downs in the device, the peak temperatures are typically sufficient to carbonize the organic coating creating a permanent, highly visible damaged area. In general, all of the prior art configurations including Buck are vulnerable to voltage break-down effects resulting from micro-cracking which penetrates multiple levels in the ceramic stack. As previously noted, panels of any significant area will almost inevitably exhibit micro-cracks, layer thickness variations, and other defects sufficient to create minor electrical breakdowns. The manufacturing yield would be reduced to unacceptable levels if all panels initially exhibiting electrical breakdown were rejected.
U.S. Pat. No. 3,048,732 by Lehmann discloses use of a “poor insulating” layer composed of an asbestos-Portland cement pressboard to limit the current associated with a voltage break-down and hence reduce the damage potential. None of the prior art provides a means to electrically isolate the fault areas without substantial residual damage to device performance. For example, U.S. Pat. No. 5,530,318 to Ensign includes a fuse integrated with the top electrode distribution bus which would disconnect major portions of the device. This invention provides current limiting in the semiconducting layer, a “fuse coating” as the top electrode, and a ceramic layer overlying the electrode, all of which combine to isolate localized voltage break-downs without significant residual damage to device appearance or performance.
U.S. Pat. Nos. 3,200,279 and 3,201,632 by Westerveld, et al. utilize stainless steel (termed chrome-iron steel by Westerveld) as a substrate in a classic device as previously illustrated in FIG. 1. This substrate choice offers a definite improvement in terms of matched coefficients of thermal expansion but the disclosed dielectric configuration and composition assure poor electrical performance with high levels of power dissipation due to the diffusion of metal ions into the dielectric layer creating semiconducting behavior. Contamination of the phosphor layer is also probable. U.S. Pat. No. 4,482,580 by Emmett features a similar problem, with diffusion into the dielectric layer even though Emmett uses a low carbon steel substrate.
A number of prior art patents disclose device configurations which include an insulation layer overlying the substrate with an additional conductive coating overlying the insulation layer and serving as the base electrode for the ceramic stack. These include U.S. Pat. No. 3,103,607 to Rulon and U.S. Pat. No. 3,127,534 to Diemer as well as Emmett '580 and Winsor '192. This insulation layer and “buried” electrode can serve to prevent diffusion from the substrate while providing a convenient means to electrically drive the device such that the outermost top electrode can be held at ground potential. This has the advantage that breaks in the outer protective cover would not expose high potential electrode areas creating a potential shock hazard. However, this configuration has a significant cost penalty created by the requirement for an additional conductive layer. In addition, none of the prior art considers the electrochemical consequences of leakage currents flowing through ceramic top layers overlying and protecting the top electrode. This invention recognizes the importance of inhibiting such leakage currents and implements a strategy to insulate the entire electroceramescent device (especially including the rear surface of the substrate) in such a way that the top electrode can be held at earth ground potential while the substrate serves as the high potential electrode.
Manufacturing cost considerations are a major factor in assuring a competitive ceramic EL device. For many important application areas (e.g. commercial signage), a level of customization is required which limits the amount of special tooling that is practical. As a specific example, much of the prior art uses screen printing techniques for one or more layers which do not easily accommodate low quantities of customized designs nor large device areas. However, screen printing enables a level control which is important in assuring layer uniformity, bubble structure, etc. The manufacturing methodology taught by Emmett makes extensive use of liquid spray technology. This technology is fully compatible with relatively low cost, continuous flow processing methods. However, the evaporation of the carriers in the liquid spray slurries and the melding of the glass frits into a ceramic solid introduce a bubble structure which can have major adverse consequences. Bubbles formed in one layer can migrate to another during the firing of a subsequent layers. The bubbles tend to grow in size as they migrate upward through the ceramic stack and can result in significant electrical and optical degradation, especially if they reach the phosphor layer. This was a major problem in attempts to commercialize the Emmett design. Unlike prior art, this invention includes a combination of liquid spray and electrostatic spray options which support application to large areas in a continuous manufacturing flow while assuring controlled bubble structure and layer uniformity.